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On-Demand Webinars

Title Description Language
Accelerate Custom Layout Editing with Expert and JavaScript This Webinar will provide a discussion about the basics of the JavaScript API used to customize Expert.
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Standard Cell Layout Migration and Optimization This webinar will present an efficient methodology for migrating and optimizing standard cell libraries. Foundation IP reuse through migration between non-disruptive technology nodes can save a lot of engineering resources and provide an initial basis for further optimization of layouts in the target technology.
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Exploration and Comparison of Various Parasitic Solutions and Parasitic-centric Calculations This webinar will provide an overview on methods and tools to review parasitic extractor results and to perform a number of analyses on the parasitic netlists.
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Accurate Parasitic RC Extraction using Realistic 3D TCAD Structures Accurate determination of RC parasitics is a key component to the design and integration of many state of the art semiconductor technologies.
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iPDK integration into Gateway Schematic Capture This webinar will provide a discussion of the integration of iPDK design kits into the Gateway tool flow. iPDK’s are fast becoming the prefered method for foundries to release process designs kits to customers. The adoption of the standard is becoming ubiquitous feature for EDA vendors in the schematic capture and layout business. The webinar will cover how to integrate iPDK’s into Gateway including some of the pitfalls and gaps in the current iPDK standard.
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Get a Head Start on Reliability Analysis Early in Your Design Cycle This webinar introduces the best practices for ensuring robustness and ease-of-use in performing power, EM and IR drop analysis on various types of IC designs early in the design cycle using simple and minimalistic input data.
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Secrets of Parasitic Extraction Unveiled This webinar will review a flow that can qualitatively and quantitatively compare two extraction flavors for the same design. At the end of this session, switching between different layout parasitic extraction tools, calibrating settings to a new technology node, qualifying PDK updates etc will no longer be a bottleneck for CAD teams.
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Power Distribution Network Analysis for Layout Engineers This webinar will provide an overview of Silvaco’s new reliability analysis tool InVar Prime. InVar Prime is an addition to the family of InVar power integrity signoff tools.
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Variation aware design for advanced nodes and low power technologies Designers' characterization and verification tasks have become more critical due to scaled down process technologies such as FinFET or FDSOI, and the drive towards lower Vdd/Vth processes.
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Partitioning and DRC for 3D systems & ICs 3D integration of ICs and systems is enhancing cost scaling of “More than Moore” technology and applications. However 3D integration of heterogeneous systems and ICs presents significant challenges to future designers. To that end we introduce two prototype design software for automatic 3D space partitioning of heterogeneous 3D IC designs, and 3D Design Rule Checking (3D DRC).
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Power Integrity and Reliability Analysis This webinar will provide an overview of Silvaco’s power integrity analysis tool InVar. InVar’s concurrent approach to simultaneous modeling power, voltage and temperature makes reliability analysis real world accurate. This webinar will covergate and transistor level power, EM, IR and thermal analysis from quick design analysis to signoff. Brief introduction to required input data and a short demo will also be presented.
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Easy design migration to Silvaco Custom Design flow via OpenAccess This webinar will provide an overview for how circuit designers can use Silvaco's schematic capture tool, Gateway and layout editor, Expert in an OpenAccess environment.
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Title Description Language
Silvaco SIPware Automotive IP Silvaco has partnered with semiconductor leaders like NXP, Infineon and TI to offer a comprehensive portfolio of automotive communication IP that is production-proven in over millions of vehicles. This webinar will provide a discussion of automotive segments and trends with a review of the relevant standards and the specific capabilities of automotive controller IPs from the Silvaco SIPware catalog.
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Next Generation of SoC Design: From Atoms to Systems This webinar provides examples of how complex new technologies such as Flash memory, other advanced non-volatile memory technologies, and complex SoCs (such as Nvidia’s Xavier and Apple’s A12), use and re-use design IP at the architectural level, but require specialized new IPs that need to be simulated and analyzed down to the nanometer and atomic levels.
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Nanometer Library Characterization: Challenges and Solutions Designers today see a significant increase in the number of simulations and PVT corners required to an accurate library characterization, including new formats to support process variations, that can be critical at advanced process nodes.
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Improving Memory on the Edge Using Octal Serial Flash Cache This webinar will provide a discussion of the various solutions available for storing and executing microprocessor code on a typical IoT system.
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MIPI I3C This webinar will provide a discussion of a new a standard from the MIPI Alliance – I3C.
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Bringing IP Management to the Enterprise Level This webinar will provide a discussion of the issues facing semiconductor companies today and the technology available from Silvaco that can help semiconductor companies organize their internal and external IP at the enterprise level, and not only design data - but also a huge amount of metadata that is non-technical.
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Subsystem Insight This webinar will provide a discussion of support for our AMBA Subsystems using Silvaco’s Drivers, HALs, and low-level software.
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SPI vs SPI This webinar will provide a discussion of Silvaco’s SPI, QSPI, and OSPI IP products and how they are useful in today’s SOCs. SOCs from small IoT devices to large complex multi-CPU devices use external Flash memory in their products.
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Getting to Know the New MIPI Alliance I3CSM Standard This webinar will provide an overview I3C as a new standard that has advantages in reducing pin count, increasing performance, and decreasing power while achieving some level of backwards compatibility with the long established I2C interface.
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Title Description Language
Robust SPICE Modeling with Verilog-A: Principles and Practical Techniques Insufficient robustness of models in SPICE circuit simulators may lead to a poor convergence, simulation failures and finally an unreliable or incorrect circuit design.
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Design Flow Applications Using the SmartSpice Analysis Engine Circuit Simulation is at the heart of many Board, IC and Package design flows. To maximize throughput and efficiency, it is necessary to understand the requirements for each of the design tools flows relying on the SmartSpice engine. In this webinar, we will be present an in-depth understanding of different flow components, what will enable and hinder success, and how to optimize performance.
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Unraveling and Optimizing Transistor-Level Simulation Circuit Simulation is one of the most critical parts of the design process. Validating circuit behavior is essential to saving cost, minimize turn-around times and establishing reliable system characteristics before IC manufacture.
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TCAD-based Model Extraction Flow for GaN HEMT Devices - Part 2 This webinar represents a continuation of a previously presented parameter extraction methodology for GaN HEMT devices.
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SPICE Modeling for Flexible Electronics Flexible electronics has an exciting potential for enabling bendable, rollable and foldable displays, smart product labeling as well as various applications in wearable, healthcare and medical electronics.
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TCAD-based Model Extraction Flow for GaN HEMT Devices - Part 1 This webinar will present a model parameter extraction methodology for GaN HEMT devices. This will include a review of the current SPICE compact models for GaN HEMT devices, with a discussion of Verilog-A and simulator built-in models.
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Solar cell modeling using TCAD and SPICE In this webinar a review of the TCAD-to-SPICE simulation flow of solar cells and solar panels and its related methodology will be presented.
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High Voltage Power Device Modeling with HiSIM_HV 2 This webinar will provide a comprehensive overview of model parameter extraction for high voltage devices, using the industry standard HiSIM_HV 2 model. HiSIM_HV 2 model parameter effects will be explained first, followed by a step-by-step description of model parameter extraction using Utmost IV. Finally, depletion mode, which is implemented in the latest version of HiSIM_HV 2.2.0 will be introduced.
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High Voltage Power Device Modeling with HiSIM_HV 2 This webinar will provide a comprehensive overview of model parameter extraction for high voltage devices, using the industry standard HiSIM_HV 2 model. HiSIM_HV 2 model parameter effects will be explained first, followed by a step-by-step description of model parameter extraction using Utmost IV. Finally, depletion mode, which is implemented in the latest version of HiSIM_HV 2.2.0 will be introduced.
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Simulating Total Dose, Prompt Dose, Damaging Fluence and SEU using TCAD This webinar will provide specific approaches for simulating electronic device behavioral changes, including oxide charging and physical damage, during their exposure to four of the most common radiation environments that occur during operation in space or near any other high energy particle or photonic source.

Referenced paper link
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Title Description Language
Device Simulation of Oxide Semiconductor TFTs: Device Modeling and Self-Heating Effects This webinar shows how to use Silvaco simulators for OS TFT device simulation. The carrier-electron transport and electronic states of OSs are reflected in the mobility model and DOS (density of subgap states) distribution.
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Silvaco TCAD: Introduction and the Basics - Part 3 Part III of this webinar series will provide a discussion and instruction to TCAD process simulation with Victory Process. The session will walk through the basics of semiconductor process simulation, structure design and process emulation, and more.
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Silvaco TCAD: Introduction and the Basics - Part 2 Part II of this webinar series takes a dive into creating a new device simulation deck. Attendees will learn how to use DeckBuild to write a fully functional device simulation deck. This webinar is focused as a tutorial and will be giving a step-by-step guide building and running a device entirely in the device simulators themselves—from mesh specification, setting material parameters and models, to simulating device characteristics and analyzing results in TonyPlot. This webinar will help provide attendees a better understanding of the TCAD flow and help solidify core concepts to improve the users ability to generate working TCAD simulations.
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Silvaco TCAD: Introduction and the Basics - Part 1 Attendees of this webinar will receive an overview to TCAD and Silvaco’s TCAD tools. TCAD will be defined and how TCAD is applied in the microelectronic industry, and where the future of TCAD is headed. Attendees will then be given an introduction to Silvaco’s TCAD flow and the components to design, simulate, and analyze TCAD simulations.
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Managing Design Technology Co-Optimization (DTCO) Using One Command File This webinar illustrates the advantages of using a single command file and a GDSII layout to create an entire Design Technology Co-Optimization (DTCO) experiment set, using physics-based 3D active devices and Back End Of Line (BEOL) interconnect cell level structures, for extraction of the active device Spice model parameters and extracted RC parasitics using a 3D field solver, and for final Spice circuit simulation
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Introduction to Atomistic Simulation for Nanodevices This webinar will provide introduction to the atomistic simulation capabilities of NEMO5, which is evolving into the Silvaco TCAD tool-suite. NEMO5 is a multipurpose nanodevice simulation tool created at Purdue University with 65+ authors and 100+ years of development teamwork over the last decade.
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TCAD-based Model Extraction Flow for GaN HEMT Devices - Part 2 This webinar represents a continuation of a previously presented parameter extraction methodology for GaN HEMT devices.
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Simulation of Reliability and NBTI Aging in MOS Microelectronics This webinar will cover several of the most prominent reliability models (available in Silvaco’s TCAD tools). We will review their basic features and key parameters and discuss their correct calibration and comparison to experimental results.
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TCAD Solution for Flexible Display Display devices have been developed for many years to create the high speed and high resolution display panels required for TVs, mobile phone, and other consumer electronics.
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Bandstructure Effects in Nano Devices As semiconductor device and circuit engineers we traditionally think of band edges and effective masses as fixed fundamental material parameters.
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TCAD-based Model Extraction Flow for GaN HEMT Devices - Part 1 This webinar will present a model parameter extraction methodology for GaN HEMT devices. This will include a review of the current SPICE compact models for GaN HEMT devices, with a discussion of Verilog-A and simulator built-in models.
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Introduction to TCAD – Device Theory Put into Practice In this webinar Silvaco hosts an esteemed guest lecturer, Dr. Hugh Barnaby, Professor EECE at Arizona State University. In this webinar attendees will be given an overview of Silvaco TCAD, and Dr. Barnaby will provide his perspective on utilizing TCAD efficiently and effectively as part of learning semiconductor device physics, as well as adopting TCAD as part of an engineer’s toolbox to explore and design new technologies with physics-based modeling.
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How TCAD Can Help You to Find The Right Material To Build Your Flexible Display The mechanical stress in a thin-film transistor on flexible substrate is one of the most important problem in the display industry.
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Accurate Parasitic RC Extraction using Realistic 3D TCAD Structures Accurate determination of RC parasitics is a key component to the design and integration of many state of the art semiconductor technologies.
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SPICE Modeling for Flexible Electronics Flexible electronics has an exciting potential for enabling bendable, rollable and foldable displays, smart product labeling as well as various applications in wearable, healthcare and medical electronics.
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How FPD Designers Can Improve Productivity This webinar will provide a discussion about new features of Silvaco’s Layout Editor tool (Expert) for improving design productivity on FPD layout.
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Simulating Total Dose, Prompt Dose, Damaging Fluence and SEU using TCAD This webinar will provide specific approaches for simulating electronic device behavioral changes, including oxide charging and physical damage, during their exposure to four of the most common radiation environments that occur during operation in space or near any other high energy particle or photonic source.

Referenced paper link
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TCAD Simulation of Ion Transport and Electrochemistry This webinar will discuss the simulation of ion transport and electrochemistry in semiconductor devices. These phenomena are of interest both in cases where they are intentional, as in the design of non-volatile memories and solid-state batteries; and in cases where they are unintentional, as in a number of degradation mechanisms.
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Accelerating TFT and FPD Design This webinar will provide an overview of different techniques for TFT and FPD design enabled by the Silvaco EDA tool portfolio. With recent advances in display technology, circuits in display designs have enhanced their functionality and grown rapidly in size.
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Enabling TCAD for TFT, LCD & OLED Display Designs This webinar will provide an insight into different TCAD-based simulation techniques that designers of TFT, LCD and OLED display can make use of. First, we will discuss both electrical and optical TCAD simulations of LED/OLED diodes. Next, we will explore LCD simulation and analysis including calculation of transmission patterns at various wavelengths and applied voltages.
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TCAD Simulation of Organic Optoelectronic Devices This webinar will introduce Radiant developed as an integrated simulation environment of LED and OLED devices and will focus on an OLED, which is getting much attention in the field of displays and lighting applications for its excellent efficiency, color quality and color tunability.
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Victory Process 2D - An Innovative Alternative to SUPREM-based Simulators Ensuring Robust 3D Solutions Two-dimensional process simulators based on SUPREM-IV from Stanford University have been used in semiconductor research and industry for almost 30 years.
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TCAD Usability: DeckBuild and Virtual Wafer Fab This webinar will give a demonstration of the tools DeckBuild and Virtual Wafer Fab, which are the front end GUI tools to run TCAD simulations.
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TCAD Simulation of Organic Optoelectric Devices This webinar will introduce Radiant developed as an integrated simulation environment of LED and OLED devices and will focus on an OLED, which is getting much attention in the field of displays and lighting applications for its excellent efficiency, color quality and color tunability.
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TCAD Simulation of Wide Bandgap Power Devices Simulation of wide bandgap power devices has always posed convergence challenges. In addition to this, the emphasis is shifting to accuracy and calibration of models in relation to manufacturing data.
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TCAD Simulation of Wide Bandgap Power Devices Simulation of wide bandgap power devices has always posed convergence challenges. In addition to this the emphasis is shifting to accuracy and calibration of models relative to manufacturing data.
JP
Simulation of Physical Etching in Memory Technology This webinar will provide a deep insight into the methods, mechanisms and models to simulate physical etching with a special focus on memory technology.
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Efficient 3D TCAD Simulation of Silicon Power Devices It is well known that TCAD simulation can save time and money since it allows process and device engineers to virtually manufacture any type of devices before processing them. Today, a lot of devices are 3D by “nature” and thus need to be simulated using 3D process and device simulators.
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Leakage Current TCAD Calibration in a-Si TFTs This webinar will outline in detail a calibration procedure used for amorphous silicon Thin-Film Transistors (a-Si TFTs) where TCAD simulations are compared to measurements. We will present a TCAD calibration procedure with emphasis on leakage current, which will help attendees to design and optimize a-Si TFT technology. In this webinar we will review generic and specific physical models used during TFT TCAD simulation including density of states (DOS) and band to band tunneling.
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TCAD to SPICE simulation of SiC and Si Power Devices This webinar will provide a discussion of the methods used to design, simulate and optimize the performance of power devices using TCAD and SPICE simulations. Silicon has long been the semiconductor of choice for high-voltage power electronics applications. However, wide-bandgap semiconductors such as SiC have begun to attract attention due to their projected improved performance over silicon.
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Modeling and Analysis of Single Event Effects This webinar will provide a discussion of the methods used by radiation effects engineers to model the space radiation environment and some of its effects on devices and circuits. The remarkable advances in modern device technology creates specific challenges for high–fidelity radiation effects modeling.
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Title Description Language
Memory Statistical Characterization Solution with VarMan With each new semiconductor process node, process variation, both global and local, play an increasingly significant role in determining Memory performance.
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Standard Cell Statistical Characterization with VarMan With each new semiconductor process node, process variation, both global and local, play an increasingly significant role in determining standard cell library performance.
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Statistical analysis flow for analog design with VarMan The impact of variation on analog design has become critical with the advanced nodes technology. The regular Monte Carlo approach for statistical analysis has reached its limit and can no longer address the needs for analog designers in terms of performance.
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Variation aware design for advanced nodes and low power technologies Designers' characterization and verification tasks have become more critical due to scaled down process technologies such as FinFET or FDSOI, and the drive towards lower Vdd/Vth processes.
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